Display device and method of manufacturing the same

ABSTRACT

A display device includes a substrate including a plurality of pixel areas and a non-pixel area disposed between the pixel areas, a tunnel-shaped cavity disposed on the substrate in each of the pixel areas, an image display layer disposed in the tunnel-shaped cavity, a roof layer disposed on the tunnel-shaped cavity and having an upper planarized surface, a black matrix disposed on the substrate in the non-pixel area, and a reflective electrode disposed under the tunnel-shaped cavity in a predetermined area of each of the pixel areas to reflect an external light.

CROSS-REFERENCE TO RELATED APPLICATION

This U.S. non-provisional patent application claims priority under 35U.S.C. §119 to Korean Patent Application No. 10-2014-0003531 filed Jan.10, 2014, the contents of which are hereby incorporated by reference intheir entirety.

BACKGROUND

1. Field of Disclosure

The present disclosure relates to a display device and a method ofmanufacturing the display device.

2. Description of the Related Art

In recent years, various display devices, such as liquid crystal displaydevices, organic light emitting diode display devices, electrowettingdisplay devices, plasma display panels, electrophoretic display devices,etc., have been developed.

In general, a display device includes two substrates and an imagedisplay part interposed between the two substrates. The two substratesface each other and are coupled to each other. The two substrates arespaced apart from each other by a predetermined distance such that theimage display part is disposed between the two substrates.

When the display device is manufactured, a spacer is formed on one ofthe two substrates to maintain a distance between the two substrates.The spacer is attached to the other of the two substrates using anadhesive. However, the formation of the spacer and the assembly of thesubstrate may increase the complexity of the manufacturing process,thereby increasing the manufacturing cost of the display device.

SUMMARY

The present disclosure relates to a transflective display device.

According to some embodiments of the inventive concept, a display deviceis provided. The display device includes: a substrate including aplurality of pixel areas and a non-pixel area disposed between the pixelareas; a tunnel-shaped cavity disposed on the substrate in each of thepixel areas; an image display layer disposed in the tunnel-shapedcavity; a roof layer disposed on the tunnel-shaped cavity and having anupper planarized surface; a black matrix disposed on the substrate inthe non-pixel area; and a reflective electrode disposed under thetunnel-shaped cavity in a predetermined area of each of the pixel areasto reflect an external light.

In some embodiments, the display device may further include a colorfilter disposed on the substrate in each of the pixel areas.

In some embodiments, the color filter may include a red color filter, agreen color filter, or a blue color filter.

In some embodiments, the display device may further include: a firstelectrode disposed on the color filter; and a second electrode extendingin a first direction and spaced apart upward from the substrate in thepixel area and a predetermined area of the non-pixel area to define thetunnel-shaped cavity. The roof layer may be disposed on the secondelectrode.

In some embodiments, each of the pixel areas may include a transmissivearea that transmits light and a reflective area including a reflectiveelectrode disposed therein. The non-pixel area may include a firstnon-pixel area disposed between the pixel areas in the first directionand extending in a second direction crossing the first direction, and asecond non-pixel area disposed between the pixel areas in the seconddirection and extending in the first direction. The reflective area maybe disposed adjacent to the first area, and the second electrode mayextend in a first area defined by a predetermined area of the secondnon-pixel area in the second direction.

In some embodiments, the tunnel-shaped cavity may have a first height inthe transmissive area, a second height in the reflective area, and athird height in the first area that does not overlap with the firstnon-pixel area, wherein the second height may be less than the firstheight and greater than the third height.

In some embodiments, the second electrode may be spaced apart from thecolor filter by the first height in the transmissive area, spaced apartfrom the color filter by the second height in the reflective area, andspaced apart from the black matrix by the third height in the first areathat does not overlap with the first non-pixel area.

In some embodiments, the third height may be equal to or less than about1.1 micrometers.

In some embodiments, the display device may further include a thin filmtransistor disposed on the substrate in the non-pixel area and connectedto the first electrode, and an insulating layer disposed on thesubstrate covering the thin film transistor and having a concavo-convexshape in the reflective area. The reflective electrode may be disposedon the insulating layer in the reflective area and having theconcavo-convex shape, and the color filter and the black matrix may bedisposed on the insulating layer.

In some embodiments, the display device may further include an alignmentlayer disposed on an inner surface of the second electrode in thetunnel-shaped cavity and on the substrate covering the first electrode.The alignment layer may enclose the tunnel-shaped cavity in the firstarea adjacent to the reflective area.

In some embodiments, the image display layer may have a first distancecorresponding to a difference in height between the alignment layerdisposed on the first electrode in the transmissive area and thealignment layer disposed on the inner surface of the second electrode inthe transmissive area, and a second distance corresponding to adifference in height between the alignment layer disposed on the firstelectrode in the reflective area and the alignment layer disposed on theinner surface of the second electrode in the reflective area, andwherein the second distance may be about half of the first distance.

In some embodiments, the image display layer may be a liquid crystallayer.

In some embodiments, the display device may further include a sealinglayer disposed on the roof layer and covering the substrate to seal thetunnel-shaped cavity.

According to some other embodiments of the inventive concept, a methodof manufacturing a display device is provided. The method includes:providing a substrate including a plurality of pixel areas and anon-pixel area between the pixel areas, the substrate including areflective electrode disposed in a predetermined area of each of thepixel areas to reflect an external light; forming a first electrode onthe substrate in each of the pixel areas; forming a sacrificial layerextending in a column direction on the substrate, wherein thesacrificial layer has a first height and a second height in each of thepixel areas and a third height in the non-pixel area, wherein the secondheight is less than the first height and greater than the third height;forming a second electrode extending in a row direction on the substrateto cover the sacrificial layer in the pixel areas and the predeterminedarea of the non-pixel area; forming a roof layer covering an uppersurface of the second electrode and having an upper planarized surface;wet-etching the sacrificial layer to form a tunnel-shaped cavity betweenthe second electrode and the substrate; providing a liquid crystal layerin the tunnel-shape cavity; and forming a sealing layer on the rooflayer to cover the substrate and to seal the tunnel-shaped cavity.

In some embodiments, each of the pixel areas may include a transmissivearea that transmits a light, and a reflective area including areflective electrode disposed therein. The non-pixel area may include afirst non-pixel area disposed between the pixel areas in the firstdirection and extending in a second direction crossing the firstdirection, and a second non-pixel area disposed between the pixel areasin the second direction and extending in the first direction. Thereflective area may be disposed adjacent to the first area, and thesecond electrode may extend in a first area defined by a predeterminedarea of the second non-pixel area in the second direction.

In some embodiments, the tunnel-shaped cavity may have the first heightin the transmissive area, the second height in the reflective area, andthe third height in the first area that does not overlap with the firstnon-pixel area.

In some embodiments, the third height may be equal to or less than about1.1 micrometers.

In some embodiments, the method may further include providing analignment solution in the tunnel-shaped cavity of the substrate, anddrying the alignment solution to form an alignment layer on an innersurface of the second electrode and on the substrate. The alignmentlayer may cover the first electrode, and the alignment layer may bebound in the first area adjacent to the reflective area to enclose thetunnel-shaped cavity.

In some embodiments, the liquid crystal layer may have a first distancecorresponding to a difference in height between the alignment layerdisposed on the first electrode in the transmissive area and thealignment layer disposed on the inner surface of the second electrode inthe transmissive area, and a second distance corresponding to adifference in height between the alignment layer disposed on the firstelectrode in the reflective area and the alignment layer disposed on theinner surface of the second electrode in the reflective area, andwherein the second distance may be about half of the first distance.

In some embodiments, the substrate may include: a base substrate; a thinfilm transistor formed on the base substrate in the non-pixel area andconnected to the first electrode; an insulating layer disposed on thebase substrate covering the thin film transistor and having aconcavo-convex shape in the reflective area; a color filter disposed onthe insulating layer in the pixel area; and a black matrix disposed onthe insulating layer in the non-pixel area, and the reflective electrodemay be disposed on the insulating layer in the reflective area andhaving the concavo-convex shape.

According to the above embodiments, the display device may have atransflective device structure. In addition, the viewing angle of thedisplay device may be increased and the alignment layer may be uniformlyformed.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other advantages of the present disclosure will be readilyapparent by reference to the following detailed description whenconsidered in conjunction with the accompanying drawings.

FIG. 1 is a plan view of a display device according to an exemplaryembodiment of the present disclosure.

FIG. 2 is a perspective view of a portion of a display area of a displaypanel shown in FIG. 1.

FIG. 3 is a layout diagram of a pixel shown in FIG. 1.

FIG. 4 is a cross-sectional view taken along line I-I′ of FIG. 3.

FIG. 5 is a cross-sectional view taken along line II-II′ of FIG. 3.

FIG. 6 is a cross-sectional view taken along line III-III′ of FIG. 3.

FIG. 7 is a cross-sectional view taken along line IV-IV′ of FIG. 3.

FIG. 8 is a cross-sectional view taken along line V-V′ of FIG. 3.

FIGS. 9A and 9B are views of a display device when operated in areflective mode according to an exemplary embodiment of the presentdisclosure.

FIGS. 10A and 10B are views of a display device when operated in atransmissive mode according to an exemplary embodiment of the presentdisclosure.

FIG. 11 is a perspective view of a sacrificial layer formed on asubstrate.

FIGS. 12A and 12B are cross-sectional views of the sacrificial layertaken along line VI-VI′ of FIG. 11 according to an exemplary method ofmanufacturing the display device.

FIGS. 13A and 13B are cross-sectional views of the sacrificial layertaken along line VII-VII′ of FIG. 11 according to an exemplary method ofmanufacturing the display device.

FIGS. 14A and 14B are cross-sectional views of a second electrode takenalong lines VI-VI′ and VII-VII′ of FIG. 11.

FIGS. 15A and 15B are cross-sectional views of a roof layer taken alonglines VI-VI′ and VII-VII′ of FIG. 11.

FIGS. 16A and 16B are cross-sectional views of a tunnel-shaped cavitytaken along lines VI-VI′ and VII-VII′ of FIG. 11.

FIGS. 17A to 17D are cross-sectional views of an alignment layer takenalong lines VI-VI′ and VII-VII′ of FIG. 11.

FIGS. 18A and 18B are cross-sectional views of a liquid crystal layer inthe tunnel-shaped cavity taken along lines VI-VI′ and VII-VII′ of FIG.11.

FIGS. 19A and 19B are cross-sectional views of a sealing layer takenalong lines VI-VI′ and VII-VII′ of FIG. 11.

DETAILED DESCRIPTION

It will be understood that when an element or layer is referred to asbeing “on”, “connected to” or “coupled to” another element or layer, itcan be directly on, connected or coupled to the other element or layeror intervening elements or layers may be present. In contrast, when anelement is referred to as being “directly on,” “directly connected to”or “directly coupled to” another element or layer, there are nointervening elements or layers present. Like numbers refer to likeelements throughout. As used herein, the term “and/or” includes any andall combinations of one or more of the associated listed items.

It will be understood that, although the terms first, second, etc. maybe used herein to describe various elements, components, regions, layersand/or sections, these elements, components, regions, layers and/orsections should not be limited by these terms. These terms are only usedto distinguish one element, component, region, layer or section fromanother region, layer or section. Thus, a first element, component,region, layer or section discussed below could be termed a secondelement, component, region, layer or section without departing from theteachings of the present inventive concept.

Spatially relative terms, such as “beneath”, “below”, “lower”, “above”,“upper” and the like, may be used herein for ease of description todescribe one element or feature's relationship to another element(s) orfeature(s) as illustrated in the figures. It will be understood that thespatially relative terms are intended to encompass differentorientations of the device in use or operation in addition to theorientation depicted in the figures. For example, if the device in thefigures is turned over, elements described as “below” or “beneath” otherelements or features would then be oriented “above” the other elementsor features. Thus, the exemplary term “below” can encompass both anorientation of above and below. The device may be otherwise oriented(rotated 90 degrees or at other orientations) and the spatially relativedescriptors used herein interpreted accordingly.

The terminology used herein is for the purpose of describing particularembodiments only and is not intended to be limiting of the inventiveconcept. As used herein, the singular forms, “a”, “an” and “the” areintended to include the plural forms as well, unless the context clearlyindicates otherwise. It will be further understood that the terms“includes” and/or “including”, when used in this specification, specifythe presence of stated features, integers, steps, operations, elements,and/or components, but do not preclude the presence or addition of oneor more other features, integers, steps, operations, elements,components, and/or groups thereof.

Unless otherwise defined, all terms (including technical and scientificterms) used herein have the same meaning as commonly understood by oneof ordinary skill in the art to which this inventive concept belongs. Itwill be further understood that terms, such as those defined in commonlyused dictionaries, should be interpreted as having a meaning that isconsistent with their meaning in the context of the relevant art andwill not be interpreted in an idealized or overly formal sense unlessexpressly so defined herein.

Hereinafter, the present inventive concept will be explained in detailwith reference to the accompanying drawings.

FIG. 1 is a plan view of a display device according to an exemplaryembodiment of the present disclosure.

Referring to FIG. 1, a display device 500 includes a display panel 100,a gate driver 200, a data driver 300, and a driving circuit board 400.

The display panel 100 includes a display area DA in which a plurality ofpixels PX11 to PXnm are arranged in a matrix form, and a non-displayarea NDA surrounding the display area DA. The display panel 100 furtherincludes a plurality of gate lines GL1 to GLn, and a plurality of datalines DL1 to DLm insulated from the gate lines GL1 to GLn while crossingthe gate lines GL1 to GLn.

The gate lines GL1 to GLn are connected to the gate driver 200 so as tosequentially receive gate signals from the gate driver 200. The datalines DL1 to DLm are connected to the data driver 300 so as to receivedata voltages from the data driver 300. The data voltages may beprovided in analog form.

The pixels PX11 to PXnm are respectively arranged in areas defined bythe gate lines GL1 to GLn and the data lines DL1 to DLm. Therefore, thepixels PX11 to PXnm are arranged in n rows by m columns. In the presentexemplary embodiment, each of “m” and “n” is an integer greater than 0.

Each of the pixels PX11 to PXnm is connected to a corresponding gateline of the gate lines GL1 to GLn and a corresponding data line of thedata lines DL1 to DLm. The pixels PX11 to PXnm receive the data voltagesthrough the data lines DL1 to DLm in response to the gate signalsapplied through the gate lines GL1 to GLn. The pixels PX11 to PXnm thendisplay gray scales corresponding to the data voltages.

The gate driver 200 is disposed in a portion of the non-display area NDAadjacent to a left side of the display area DA. In detail, the gatedriver 200 may be disposed in the portion of the non-display area NDAadjacent to the left side of the display area DA as an amorphous siliconTFT gate driver circuit (ASG).

The gate driver 200 generates the gate signals in response to a gatecontrol signal applied from a timing controller. The timing controller(not shown) is mounted on the driving circuit board 400. The gatesignals are sequentially applied to the pixels PX11 to PXnm through thegate lines GL1 to GLn row by row. Thus, the pixels PX11 to PXnm aredriven row by row.

The data driver 300 receives image signals and a data control signalfrom the timing controller. The data driver 300 generates the datavoltages in analog form (corresponding to the image signals) in responseto the data control signal. The data driver 300 applies the datavoltages to the pixels PX11 to PXnm through the data lines DL1 to DLm.

The data driver 300 includes a plurality of source driving chips 310_1to 310_k. “k” is an integer greater than 0 and smaller than “m”. Each ofthe source driving chips 310_1 to 310_k is mounted on a correspondingflexible circuit board of flexible circuit boards 320_1 to 320_k, andconnected between the driving circuit board 400 and the non-display areaNDA disposed adjacent to an upper portion of the display area DA.

In the present exemplary embodiment, the data driver 300 may beconnected to the display panel 100 using a tape carrier package (TCP).However, the inventive concept is not limited thereto. In some otherembodiments, the source driving chips 310_1 to 310_k may be mounted inthe non-display area NDA disposed adjacent to the upper portion of thedisplay area DA using a chip on glass (COG) method.

FIG. 2 is a perspective view of a portion of the display area DA of thedisplay panel 100 of FIG. 1.

Referring to FIG. 2, the display panel 100 includes a substrate 110, anda plurality of first electrodes E1 and second electrodes E2 disposed onthe substrate 110.

The substrate 110 includes a plurality of pixel areas PA correspondingrespectively to the pixels PX11 to PXnm. The substrate 110 also includesnon-pixel areas NPA1 and NPA2 disposed between the pixel areas PA. Thepixel areas PA are arranged in a matrix form (similar to the pixels PX11to PXnm). The non-pixel areas NPA1 and NPA2 correspond to boundary areasbetween the pixel areas PA.

Hereinafter, a row direction is referred to as a first direction X1 anda column direction crossing the row direction is referred to as a seconddirection X2.

The non-pixel areas NPA1 and NPA2 include a first non-pixel area NPA1and a second non-pixel area NPA2. The first non-pixel area NPA1 isdisposed between the pixel areas PA in the first direction X1 andextends in the second direction X2. The second non-pixel area NPA2 isdisposed between the pixel areas PA in the second direction X2 andextends in the first direction X1. Accordingly, the first non-pixel areaNPA1 and the second non-pixel area NPA2 overlap with each other inpositions at which the first direction X1 crosses the second directionX2.

The first electrodes E1 corresponding to the pixels PX11 to PXnm arerespectively disposed in the pixel areas PX of the substrate 110.

The second electrodes E2 are disposed spaced apart from each other onthe substrate 110, and extend in the first direction X1. The secondelectrodes E2 may be referred to as common electrodes. The secondelectrodes E2 overlap with the pixel areas PA in the first direction X1and a predetermined area A1 of the second non-pixel area NPA2 in thesecond direction X2. Hereinafter, the predetermined area A1 of thesecond non-pixel area NPA2 is referred to as a first area A1.

The second electrodes E2 are spaced apart upward from the substrate 110in the pixel areas PA and the first area A1 of the second non-pixel areaNPA2, so as to define a tunnel-shaped cavity TSC in each pixel area PA.

In detail, each of the second electrodes E2 includes a firstsub-electrode SE1 and a second sub-electrode SE2 extending in the firstdirection X1. The first sub-electrode SE1 overlaps with the pixel areasPA arranged in the first direction X1 and the first non-pixel area NPA1between the pixel areas PA in the first direction X1. The firstsub-electrode SE1 is disposed adjacent to the substrate 110 in the firstnon-pixel area NPA1 and spaced apart upward from the substrate 110 inthe pixel areas PA.

The second sub-electrode SE2 is connected to the first sub-electrode SE1and extends to the first area A1 of the second non-pixel area NPA2 inthe second direction X2. The second sub-electrode SE2 is disposedadjacent to the substrate 110 in a portion of the first area A1overlapping with the first non-pixel area NPA1. That is, the secondsub-electrode SE2 is disposed adjacent to the substrate 110 in the firstnon-pixel area NPA1. The second sub-electrode SE2 is spaced apart upwardfrom the substrate 110 in a portion of the first area A1 that does notoverlap with the first non-pixel area NPA1.

As shown in FIG. 2, the first sub-electrode SE1 is spaced apart upwardfrom the substrate 110 in the pixel areas PA at two different distances.Specifically, the second sub-electrode E2 is spaced apart upward fromthe substrate 110 (in the portion of the first area A1 that does notoverlap with the first non-pixel area NPA1) by a smaller distance than adistance measured between the substrate 110 and the first sub-electrodeSE1.

The tunnel-shaped cavity TSC is defined by a space formed between thefirst sub-electrode SE1 and the substrate 110 in the pixel areas PA, aswell as a space formed between the second sub-electrode SE2 and thesubstrate 110 in the portion of the first area A1 that does not overlapwith the first non-pixel area NPA1. That is, the tunnel-shaped cavityTSC may be defined by the second electrode E2.

An image display layer LC is disposed in the tunnel-shaped cavity TSC.The image display layer LC displays an image in accordance with anelectric field formed between the first electrode E1 and the secondelectrode E2. The image display layer LC may include, but is not limitedto, a liquid crystal layer LC. In some other embodiments, the imagedisplay layer LC may include an electrophoretic layer or anelectrowetting layer. In the embodiments described herein, the imagedisplay layer LC corresponds to the liquid crystal layer LC.

The tunnel-shaped cavity TSC extends in the second direction X2, withboth end portions of the tunnel-shaped cavity TSC in the seconddirection X2 being opened. Although not shown in the figures, a rooflayer may be disposed on the substrate 110 covering an upper surface ofthe second electrode E2, and a sealing layer may be disposed on the rooflayer. The sealing layer covers the substrate 110 to seal both the endportions of the tunnel-shaped cavity.

FIG. 3 is a layout diagram of a pixel of FIG. 1.

In the present exemplary embodiment, the pixels have the same structureand function, and thus an exemplary pixel PXij will be described indetail with reference to FIG. 3.

Referring to FIG. 3, the gate lines GLi-1 and GLi extend in the firstdirection X1, and the data lines DLj and DLj+1 extend in the seconddirection X2 crossing the gate lines GLi-1 and GLi. Here, “i” is aninteger greater than zero (0) and equal to or smaller than “n”, and “j”is an integer greater than zero (0) and equal to or smaller than “m”.The data lines DLj and DLj+1 are disposed in the first non-pixel areaNPA1, and the gate lines GLi-1 and GLi are disposed in the secondnon-pixel area NPA2.

The pixel PXij includes a thin film transistor TFT connected to thecorresponding data line DLj and the corresponding gate line GLi. Thethin film transistor TFT is disposed in the second non-pixel area NPA2.The first electrode E1 is connected to the thin film transistor TFT, anda third electrode E3 overlaps with a predetermined area of the firstelectrode E1. The second electrode E2 forms the tunnel-shaped cavityTSC, and the liquid crystal layer LC is disposed in the tunnel-shapedcavity TSC.

Next, the second electrode E2 (defining the tunnel-shape cavity TSC) andthe liquid crystal layer LC disposed in the tunnel-shaped cavity TSCwill be described in detail with reference to FIGS. 4 to 6.

The area in which the pixel PXij is formed includes the pixel area PAand also the first and second non-pixel areas NPA1 and NPA2 between thepixel areas PA. An image is displayed in the pixel area PA, but is notdisplayed in the first and second non-pixel areas NPA1 and NPA2 becausethe first and second non-pixel areas NPA1 and NPA2 block and preventlight from passing through.

The pixel area PA includes a transmissive area TA and a reflective areaRA. The transmissive area TA transmits the light and the reflective areaRA reflects an external light. As shown in FIG. 3, the reflective areaRA is disposed adjacent to the first area A1.

The first electrode E1 is disposed in a corresponding pixel area PA. Inthe example of FIG. 3, a lower area of the first electrode E1 does notoverlap with the pixel area PA. In some embodiments, the first electrodeE1 may overlap with the entire the pixel area PA. In those embodiments,the first electrode E1 is disposed overlapping with the second electrodeE2 in the pixel area PA.

The second electrode E2 extends in the first direction X1 to overlapwith the pixel area PA. The second electrode E2 receives a commonvoltage.

The first and second electrodes E1 and E2 include a transparentconductive material (e.g., indium tin oxide (ITO), indium zinc oxide(IZO), indium tin zinc oxide (ITZO), etc.).

The third electrode E3 is disposed in the reflective area RA overlappingwith the second electrode E2. In the example of FIG. 3, a width of thethird electrode E3 in the first direction X1 is less than a width of thesecond electrode E2 in the first direction X1. However, the inventiveconcept is not limited thereto. In some other embodiments, the width ofthe third electrode E3 in the first direction X1 may be equal to orgreater than the width of the second electrode E2 in the first directionX1.

The third electrode E3 may serve as a reflective electrode. The thirdelectrode E3 includes a reflective metal to reflect the light. Forinstance, the third electrode E3 may include aluminum (Al) or silver(Ag).

The thin film transistor TFT includes a gate electrode GE branching fromthe gate line GLi, a source electrode SE branching from the data lineDLj, and a drain electrode DE connected to the first electrode E1. Thedrain electrode DE extends (and is electrically connected) to the firstelectrode E1 through a contact hole CH.

FIG. 4 is a cross-sectional view taken along line I-I′ of FIG. 3; FIG. 5is a cross-sectional view taken along line II-II′ of FIG. 3; FIG. 6 is across-sectional view taken along line III-III′ of FIG. 3; FIG. 7 is across-sectional view taken along line IV-IV′ of FIG. 3; and FIG. 8 is across-sectional view taken along line V-V′ of FIG. 3.

Referring to FIGS. 4 to 8, the substrate 110 includes a base substrate111, the thin film transistor TFT disposed on the base substrate 111, acolor filter CF, and a black matrix BM.

In detail, a first insulating layer 112 is disposed on the basesubstrate 111 covering the gate lines GLi-1 and GLi. The base substrate111 may be a transparent or non-transparent insulating substrate (e.g.,a silicon substrate, a glass substrate, a plastic substrate, etc.).

Although not shown in the figures, the base substrate 111 includes thepixel areas PA and the non-pixel areas NPA1 and NPA2 between the pixelareas PA (similar to the substrate 110).

The first insulating layer 112 may serve as a gate insulating layer. Thefirst insulating layer 112 includes an insulating material (such assilicon nitride, silicon oxide, etc.). The data lines DLj and DLj+1 aredisposed on the first insulating layer 112 and extend crossing the gatelines GLi-1 and GLi.

As shown in FIG. 4, the thin film transistor TFT is disposed on the basesubstrate 111. The thin film transistor TFT includes the gate electrodeGE, the semiconductor layer SM, the source electrode SE, and the drainelectrode DE.

The gate electrode GE branches from the gate line GLi. Therefore, thefirst insulating layer 112 is disposed on the base substrate 111covering the gate electrode GE.

The semiconductor layer SM of the thin film transistor TFT is disposedon the first insulating layer 112 covering the gate electrode GE.Although not shown in the figures, the semiconductor layer SM includesan active layer and an ohmic contact layer.

The source electrode SE and the drain electrode DE of the thin filmtransistor TFT are disposed on the semiconductor layer SM and the firstinsulating layer 112, and are spaced apart from each other. Thesemiconductor layer SM forms a conductive channel between the sourceelectrode SE and the drain electrode DE.

A second insulating layer 113 is disposed on the first insulating layer112 covering the thin film transistor TFT. The second insulating layer113 may be, but is not limited to, an organic insulating layer 113formed of an organic material. As shown in FIGS. 6 and 8, the secondinsulating layer 113 has a concavo-convex shape in the reflective areaRA of the pixel area PA.

The third electrode E3 is disposed on the second insulating layer 113having the concavo-convex shape in the reflective area RA. Since thethird electrode E3 is disposed on the second insulating layer 113 havingthe concavo-convex shape in the reflective area RA, the third electrodeE3 has the same concavo-convex shape as that of the second insulatinglayer 113. The second insulating layer 113 and the third electrode E3,both having the same concavo-convex shape, can diffuse or scatter thelight. Specifically, the third electrode E3 having the concavo-convexshape diffusively reflects an external light incident to the displaypanel 100.

Although not shown in the figures, a passivation layer may be disposedbetween the first and second insulating layers 112 and 113 to cover thethin film transistor TFT. The passivation layer covers the exposedsemiconductor layer SM.

The color filter CF and the black matrix BM are disposed on the secondinsulating layer 113. In addition, the color filter CF is disposed onthe second insulating layer 113 covering the third electrode E3. Asshown in FIGS. 5, 6, and 8, the color filter CF is disposed in the pixelarea PA.

The black matrix BM is disposed in the first and second non-pixel areasNPA1 and NPA2. The color filter CF and the black matrix BM overlap witheach other in the pixel area PA and the first and second non-pixel areasNPA1 and NPA2.

The color filter CF assigns a color to the light passing through thepixel PXij. The color filter CF may include one of red, green, and bluecolor filters, and is disposed corresponding to the pixel area PA.

The color filter CF may further include a white color filter. The colorfilters CF are arranged such that pixels adjacent to each other (amongthe pixels PX11 to PXnm shown in FIG. 1) display different colors.

The black matrix BM blocks light that is unnecessary to display theimage. The black matrix BM may prevent light leakage caused bymisalignment of liquid crystal molecules at the edges of the pixel areaPA or improper color mixing at the edges of the color filter CF.

The first electrode E1 is disposed on the color filter CF and a portionof the black matrix BM in the second non-pixel area NPA2. The drainelectrode DE of the thin film transistor TFT extends (and iselectrically connected) to the first electrode E1 through the contacthole CH formed through the black matrix BM and the second insulatinglayer 113.

An alignment layer ALN is disposed on the black matrix BM in the secondnon-pixel area NPA2, covering the first electrode E1. Specifically, thealignment layer ALN is disposed on the color filter CF covering thefirst electrode E1, and is disposed on an inner surface of the secondelectrode E2 inside the tunnel-shaped cavity TSC. The alignment layerALN may include polyimide (PI).

The second electrode E2 is disposed on the black matrix BM and the colorfilter CF and extends in the first direction X1. The first sub-electrodeSE1 of the second electrode E2 overlaps with the pixel areas PA arrangedin the first direction X1 and the first non-pixel area NPA1 between thepixel areas PA. The first sub-electrode SE1 is disposed adjacent to theblack matrix BM in the first non-pixel area NPA1, and spaced apartupward from the color filter CF in the pixel area PA.

As shown in FIG. 8, the second electrode E2 is spaced apart from thecolor filter CF by a first height H1 in the transmissive area TA. Thesecond electrode E2 is spaced apart from the color filter CF by a secondheight H2 in the reflective area RA. The second electrode E2 is spacedapart from the black matrix BM by a third height H3 in a portion of thefirst area A1 that does not overlap with the first non-pixel area NPA1.

Accordingly, referring to FIGS. 5 and 8, the first sub-electrode SE1 ofthe second electrode E2 is spaced apart from the color filter CF by thefirst height H1 in the transmissive area TA. Referring to FIGS. 6 and 8,the first sub-electrode SE1 is spaced apart from the color filter CF bythe second height H2 in the reflective area RA. The second height H2 isless than the first height H1.

The second sub-electrode SE2 is connected to the first sub-electrode SE1and disposed in the first area A1. The second sub-electrode SE2 isdisposed adjacent to the black matrix BM in the portion of the firstarea A1 (that overlaps with the first non-pixel area NPA1), and isspaced apart upward from the black matrix BM in another portion of thefirst area A1 (that does not overlap with the first non-pixel areaNPA1).

Referring to FIGS. 7 and 8, the second sub-electrode SE2 is spaced apartfrom the black matrix BM by the third height H3 in the portion of thefirst area A1 that does not overlap with the first non-pixel area NPA1.The third height H3 is less than the second height H2. Preferably, thethird height H3 is equal to or less than about 1.1. micrometers.

As previously described, the tunnel-shaped cavity TSC is defined by thespace formed between the first sub-electrode SE1 and the color filter CFin the pixel area PA, and also the space formed between the secondsub-electrode SE2 and the black matrix BM in the first area A1.

Thus, the tunnel-shaped cavity TSC is disposed having the first heightH1 from the substrate 110 in the transmissive area TA and the secondheight H2 from the substrate 110 in the reflective area RA. In addition,the tunnel-shaped cavity TSC is disposed having the third height H3 fromthe substrate 110 in the portion of the first area A1 that does notoverlap with the first non-pixel area NPA1.

The alignment layer ALN is disposed on the inner surface of the firstand second sub-electrodes SE1 and SE2 in the tunnel-shaped cavity TSC.In addition, the alignment layer ALN encloses the tunnel-shaped cavityTSC in the first area A1 as shown in FIG. 8. That is, the alignmentlayer ALN encloses the tunnel-shaped cavity TSC in the first area A1adjacent to the reflective area RA. The liquid crystal layer LC isdisposed in the tunnel-shaped cavity TSC.

As shown in FIGS. 5, 6, and 8, the liquid crystal layer LC has a firstdistance d1 in the transmissive area TA and a second distance d2 in thereflective area RA.

In detail, the first distance d1 corresponds to a difference in heightbetween the alignment layer ALN disposed on the first electrode E1 inthe transmissive area TA and the alignment layer ALN disposed on theinner surface of the second electrode E2 in the transmissive area TA.The second distance d2 corresponds to a difference in height between thealignment layer ALN disposed on the first electrode E1 in the reflectivearea RA and the alignment layer ALN disposed on the inner surface of thesecond electrode E2 in the reflective area RA. The second distance d2 isless than the first distance d1. In some preferred embodiments, thesecond distance d2 may be half of the first distance d1.

Hereinafter, the first distance d1 is referred to as a first cell gap d1and the second distance d2 is referred to as a second cell gap d2. Thefirst cell gap d1 corresponds to a thickness of the liquid crystal layerLC in the transmissive area TA and the second cell gap d2 corresponds toa thickness of the liquid crystal layer LC in the reflective area RA.

An anisotropic refractive index of the liquid crystal molecules of theliquid crystal layer LC is represented by “Δn”. In this case, the liquidcrystal layer LC has an optical property of “Δnd1” in the transmissivearea TA and has an optical property of “Δnd2” in the reflective area RA.

The roof layer ROF is disposed on the upper surface of the first andsecond sub-electrodes SE1 and SE2. The roof layer ROF extends in thefirst direction X1 in which the first and second sub-electrodes SE1 andSE2 extend, so as to cover the upper surface of the first and secondsub-electrodes SE1 and SE2. The roof layer ROF planarizes an uppersurface of the second electrode E2. That is, an upper surface of theroof layer ROF is planarized.

The tunnel-shaped cavity TSC extends in the second direction X1 and bothend portions of the tunnel-shaped cavity TSC are opened. That is, theend portion in an upper direction of the tunnel-shaped cavity TSC in theplan view and the end portion in a lower direction of the tunnel-shapedcavity TSC in the plan view are opened since the roof layer ROF is notformed on both the end portions of the tunnel-shaped cavity TSC. Asdescribed above, the alignment layer ALN encloses the tunnel-shapedcavity TSC in the first area A1 adjacent to the reflective area RA.

Although not shown in the figures, the inorganic insulating layer may befurther disposed between the second electrode EL2 and the roof layerROF. The inorganic insulating layer may include an insulating material(e.g., silicon nitride, silicon oxide, etc.). The inorganic insulatinglayer supports the roof layer ROF such that the tunnel-shaped cavity TSCis supported in a stable manner by the roof layer ROF.

The sealing layer SL is disposed on the roof layer ROF. The sealinglayer SL covers the base substrate 111 to block both the end portions ofthe tunnel-shaped cavity TSC, thereby sealing the tunnel-shaped cavityTSC. The sealing layer SL is disposed covering the alignment layer ALN(as previously mentioned, the alignment layer ALN encloses thetunnel-shaped cavity TSC in the first area A1).

The roof layer ROF may include an organic layer formed of an organicmaterial and the sealing layer SL may include an organic layer formed ofan organic material. However, the roof layer ROF and the sealing layerSL are not limited to the above materials. In some other embodiments,the sealing layer SL may include an organic layer formed of an organicmaterial and/or an inorganic layer formed of an inorganic material.

The thin film transistor TFT is turned on in response to a gate signalprovided through the gate line GLi. The data voltage provided throughthe data line DLj is applied to the first electrode E1 through theturned-on thin film transistor TFT. The common voltage is applied to thesecond electrode E2.

An electric field is formed between the first electrode E1 and thesecond electrode E2 due to the voltage difference between the datavoltage and the common voltage. The liquid crystal molecules of theliquid crystal layer LC are driven by the electric field formed betweenthe first electrode E1 and the second electrode E2. Accordingly, theamount of light passing through the liquid crystal layer LC is changed,and thus a desired image is displayed.

In the above-described embodiments, the display device 500 can bemanufactured using a single substrate 110. Accordingly, themanufacturing costs of the display device 500 may be reduced.

The third electrode E3 has a concavo-convex shape and is disposed on thefirst electrode E1 in the reflective area RA. The alignment layer ALN isdisposed on the third electrode E3, but may be disposed non-uniformly inthe reflective area RA due to the concavo-convex shape of the thirdelectrode E3. As a result, the alignment layer ALN may be non-uniformlyformed in the pixel area PA.

However, according to the present exemplary embodiment, the thirdelectrode E3 is disposed under the first electrode E1 and on the secondinsulating layer 113, and the first electrode E1 is disposed on thecolor filter CF (which is in turn disposed on the second insulatinglayer 113). The first electrode E1 disposed on the planarized colorfilter CF has a planarized shape without having the concavo-convexshape, and thus the alignment layer ALN is uniformly formed in the pixelarea PA.

The display device 500 may be operated in a reflective mode and/or atransmissive mode. Hereinafter, the reflective mode and the transmissivemode of the display device 500 will be described in detail withreference to FIGS. 9A, 9B, 10A, and 10B.

FIGS. 9A and 9B are views of a display device when operated in areflective mode according to an exemplary embodiment of the presentdisclosure. FIGS. 10A and 10B are views of a display device whenoperated in a transmissive mode according to an exemplary embodiment ofthe present disclosure.

As an example, the liquid crystal layer LC shown in FIGS. 9A, 9B, 10A,and 10B may include, but is not limited to, a normally white mode liquidcrystal layer LC that displays a white color when no voltage is appliedto the liquid crystal layer LC.

Referring to FIGS. 9A and 9B, the display device 500 includes a firstpolarizing film 10 and a first retardation film 20 which are disposed onthe display panel 100. The retardation film 20 has a retardation valueof λ/4.

The liquid crystal layer LC is not driven when the reflective mode is inan off state (in which no voltage is applied to the first and secondelectrodes E1 and E2). The second cell gap d2 of the reflective area RAcorresponds to half of the first cell gap d1 of the transmissive areaTA, and the retardation value of the liquid crystal layer LC is λ/4 whenthe reflective mode is in the off state. That is, when linearlypolarized light passes through the liquid crystal layer LC in thereflective area RA, the linearly polarized light is changed tocircularly polarized light. On the contrary, when circularly polarizedlight passes through the liquid crystal layer LC in the reflective areaRA, the circularly polarized light is changed to linearly polarizedlight.

The external light EX_L incident to the display panel 100 from the upperportion of the display panel 100 changes into linearly polarized lightafter passing through the first polarizing plate 10, and the linearlypolarized light changes into left circularly polarized light afterpassing through the first retardation film 20. However, in some otherembodiments, the linearly polarized light may change into rightcircularly polarized light after passing through the first retardationfilm 20. Hereinafter, the light exiting from the first retardation film20 will be referred to as left circularly polarized light.

The liquid crystal molecules LCP are in a horizontal alignment statesince no voltage is applied to the liquid crystal molecules LCP when theleft circularly polarized light passes through the liquid crystal layerLC. Due to the horizontal alignment state of the liquid crystalmolecules LCP, a phase of the left circularly polarized light is changedby λ/4, and thus the left circularly polarized light changes into thelinearly polarized light.

The linearly polarized light is reflected by the third electrode E3after passing through the first electrode E1, and the linearly polarizedlight reflected by the third electrode E3 passes through the liquidcrystal layer LC again. The phase of the linearly polarized lightreflected by the third electrode E3 is changed by λ/4 while passingthrough the liquid crystal layer LC, and the linearly polarized lightbecomes the left circularly polarized light.

The left circularly polarized light is changed to the same linearlypolarized light as the external light EX_L while passing through thefirst retardation film 20, and the linearly polarized light then exitsfrom the first polarizing plate 10. Accordingly, the display device 500displays the white color.

During the reflective mode, the external light EX_L incident to thedisplay panel 100 is diffused by the third electrode E3 having theconcavo-convex shape, so that a viewing angle of the display device 500may be increased.

The liquid crystal layer LC is operated when the reflective mode is inan on state (in which the data voltage is applied to the first electrodeE1 and the common voltage is applied to the second electrode E2). Theexternal light EX_L changes into linearly polarized light after passingthrough the first polarizing plate 10, and the linearly polarized lightchanges into left circularly polarized light after passing through thefirst retardation film 20.

The liquid crystal molecules LCP of the liquid crystal layer LC are in avertical alignment state as a result of the voltage applied thereto.Therefore, the left circularly polarized light passes through the liquidcrystal layer LC unchanged. The left circularly polarized light passingthrough the liquid crystal layer LC passes through the first electrodeE1 and is reflected by the third electrode E3. The left circularlypolarized light changes into right circularly polarized light afterbeing reflected by the third electrode E3, and the right circularlypolarized light passes through the liquid crystal layer LC unchanged.

The phase of the right circularly polarized light passing through theliquid crystal layer LC is changed by λ/4 by the first retardation film20, and thus the right circularly polarized light changes into thelinearly polarized light that is retarded by λ/2. The λ/4-retardedlinearly polarized light does not pass through the first polarizingplate 10. Thus, the display device 500 displays the black color.

Referring to FIGS. 10A and 10B, the display device 500 includes thefirst polarizing plate 10 and the first retardation film 20 which aredisposed on the display panel 100, a second polarizing plate 30 and asecond retardation film 40 which are disposed under the display panel100, and a backlight unit BLU disposed under the display panel 100 toprovide light to the display panel 100. Each of the first and secondretardation films 20 and 40 has the retardation value of λ/4.

The liquid crystal layer LC is not operated when the transmissive modeis in the off state (in which no voltage is applied to the first andsecond electrodes E1 and E2). The first cell gap d1 of the transmissivearea TA is two times greater than the second cell gap d2 of thereflective area RA, and the retardation value of the liquid crystallayer LC of the transmissive area TA in the off state is λ/2. That is,when the light passing through the liquid crystal layer LC of thetransmissive area TA comprises linearly polarized light, the linearlypolarized light passing through the liquid crystal layer LC is changedto a linearly polarized light that is polarized in a symmetricaldirection.

The light traveling to the display panel 100 from the backlight unit BLUis changed to the linearly polarized light while passing through thesecond polarizing plate 30, and the linearly polarized light is changedto a right circularly polarized light by the second retardation film 40.The right circularly polarized light is provided to the liquid crystallayer LC through the first electrode E1. When the right circularlypolarized light passes through the liquid crystal layer LC, the liquidcrystal molecules LCP are maintained in the horizontal alignment statesince no voltage is applied to the liquid crystal molecules LCP.

The right circularly polarized light is changed to the left circularlypolarized light by the horizontally aligned liquid crystal layer 300 andthe phase of the right circularly polarized light is changed by λ/4 bythe first retardation film 20, and thus the right circularly polarizedlight changes into the linearly polarized light. The linearly polarizedlight exits from the first polarizing plate 10. Accordingly, the displaydevice 500 displays the white color.

The liquid crystal layer LC is operated when the transmissive mode is inthe on state (in which the data voltage is applied to the firstelectrode E1 and the common voltage is applied to the second electrodeE2). The light provided to the display panel 100 from the backlight unitBLU is changed to the linearly polarized light while passing through thesecond polarizing plate 30, and the linearly polarized light is changedto the right circularly polarized light by the second retardation film40.

The right circularly polarized light is provided to the liquid crystallayer LC via the first electrode E1. The liquid crystal molecules LCP ofthe liquid crystal layer LC are vertically aligned in response to thevoltage applied thereto. Therefore, the right circularly polarized lightpasses through the liquid crystal layer LC unchanged.

The phase of the right circularly polarized light passing through theliquid crystal layer LC is changed by λ/4 by the first retardation film20, and thus the right circularly polarized light changes into thelinearly polarized light that is retarded by λ/2. The λ/4-retardedlinearly polarized light does not pass through the first polarizingplate 10. Accordingly, the display device 500 displays the black color.

As described above, the display device 500 is operated in both thereflective mode and the transmissive mode (i.e., a transflective mode).

As a result, the viewing angle of the display device 500 may beincreased, the alignment layer may be uniformly formed, and the displaydevice 500 may be operated in the transflective mode.

FIGS. 11 to 20 depict different views of the display device 500according to an exemplary method of manufacturing the display device500. In the interest of clarity, the first electrodes E1 have beenomitted in the pixel area PA in FIGS. 11 to 20, and the method ofmanufacturing the display device 500 will be described with reference tothe substrate 110.

FIG. 11 is a perspective view of a sacrificial layer formed on thesubstrate 110. FIGS. 12A and 12B are cross-sectional views of thesacrificial layer taken along line VI-VI′ of FIG. 11. FIGS. 13A and 13Bare cross-sectional views of the sacrificial layer taken along lineVII-VII′ of FIG. 11.

Referring to FIG. 11, the substrate 110 is provided and a plurality ofsacrificial layers SRC are formed on the substrate 110 extending in thesecond direction X2. The configuration of the substrate 110 is the sameas in the previously-described FIGS. 4 to 8.

Referring to FIGS. 12A and 12B, the sacrificial layer SRC is formedhaving the first height H1 on the substrate 110. The sacrificial layerSRC is formed of a negative type photoresist.

A mask M is disposed above the sacrificial layer SRC. The mask Mincludes a transmissive portion M1, a first semi-transmissive portionM2, and a second semi-transmissive portion M3. The firstsemi-transmissive portion M2 includes a first opening OP1 and the secondsemi-transmissive portion M3 includes a second opening OP2. The firstopening OP1 is greater than the second opening OP2.

An exposure process is performed using the mask M. A portion of thesacrificial layer SRC corresponding to the transmissive portion M1 isexposed. Portions of the sacrificial layer SRC correspondingrespectively to the first and second semi-transmissive portions M2 andM3 are partially exposed. In addition, since the first opening OP1 isgreater than the second opening OP2, the portion of the sacrificiallayer SRC corresponding to the first semi-transmissive portion M2 isexposed to a greater degree than the portion of the sacrificial layerSRC corresponding to the second semi-transmissive portion M3.

Since the sacrificial layer SRC is formed of a negative typephotoresist, the exposed portions remain after a developing process isperformed thereon. Accordingly, the portion of the sacrificial layer SRCexposed through the first transmissive portion M1 has the first heightH1 after the developing process. The portion of the sacrificial layerSRC exposed through the second semi-transmissive portion M2 has thesecond height H2 after the developing process, and the portion of thesacrificial layer SRC exposed through the third semi-transmissiveportion M3 has the third height H3 after the developing process.

As described above, the first height H1 is greater than the secondheight H2. The third height H3 is less than the second height H2. Insome preferred embodiments, the third height H3 may be equal to or lessthan about 1.1 micrometers.

Referring to FIGS. 13A and 13B, the sacrificial layer SRC is formedhaving the first height H1 on the substrate 110. A mask M is disposed onthe sacrificial layer SRC and includes a transmissive portion M1 and ablocking portion M4.

The exposure process is performed using the mask M. The portion of thesacrificial layer SRC corresponding to the transmissive portion M1 isexposed, whereas the portion of the sacrificial layer SRC correspondingto the blocking portion M4 is not exposed. The portion of thesacrificial layer SRC, which is exposed through the transmissive portionM1, remains having the first height H1 after the developing process. Theportion of the sacrificial layer SRC, which is not exposed by theblocking portion M4, is removed after the developing process.

FIGS. 14A and 14B are cross-sectional views of the second electrodetaken along lines VI-VI′ and VII-VII′ of FIG. 11.

Referring to FIGS. 14A and 14B, the second electrodes E2 are formed onthe sacrificial layer SRC. The second electrodes E2 extend in the firstdirection X1 and are spaced apart from each other. Each of the secondelectrodes E2 is formed overlapping with the pixel areas PA and thefirst area A1 in the first direction X1.

Although not shown in the figures, the second electrodes E2 are formedby: forming a conductive layer on the sacrificial layer SRC, forming aphotoresist pattern (having the same pattern as the desired secondelectrodes) on the conductive layer, and etching the conductive layerusing the photoresist pattern as a mask. The conductive layer mayinclude a transparent conductive material (e.g., indium tin oxide,indium zinc oxide, indium tin zinc oxide, etc.). The photoresist patternis removed after the second electrodes E2 are formed.

FIGS. 15A and 15B are cross-sectional views of the roof layer takenalong lines VI-VI′ and VII-VII′ of FIG. 11.

Referring to FIGS. 15A and 15B, the roof layer ROF is formed on thesubstrate 110 covering the upper surface of the second electrode E2. Theroof layer ROF extends in the first direction X1. Therefore, the secondelectrode E2 and the roof layer ROF overlap with each other when viewedin a plan view, and thus the second electrode E2 and the roof layer ROFhave the same shape. The upper surface of the sacrificial layer SRC isexposed in an area in which the second electrode E2 and the roof layerROF are not formed. The upper surface of the roof layer ROF isplanarized.

FIGS. 16A and 16B are cross-sectional views of the tunnel-shaped cavitytaken along lines VI-VI′ and VII-VII′ of FIG. 11.

Referring to FIGS. 16A and 16B, the sacrificial layer SRC is removed bya wet etching process to form the tunnel-shaped cavity TSC. Thesacrificial layer SRC is etched starting from the exposed portion to theinner portion thereof. Accordingly, the tunnel-shaped cavity TSC extendsin the second direction X2, and the sacrificial layer SRC at both theend portions of the tunnel-shaped cavity TSC in the second direction X2is etched.

Since the tunnel-shaped cavity TSC is formed by removing the sacrificiallayer SRC, the tunnel-shaped cavity TSC has the first height H1 in thetransmissive area TA. In addition, the tunnel-shaped cavity TSC has thesecond height H2 in the reflective area RA and has the third height H3in the first area A1.

FIGS. 17A to 17D are cross-sectional views of an alignment layer takenalong lines VI-VI′ and VII-VII′ of FIG. 11.

Referring to FIG. 17A, an alignment solution ALN_L is provided on thesubstrate 110. The tunnel-shaped cavity TSC is filled with the alignmentsolution ALN_L. The alignment solution ALN_L may include polyimide (PI).

Referring to FIGS. 17B, 17C, and 17D, the alignment solution ALN_L isdried to form the alignment layer ALN. The alignment layer ALN is formedon the substrate 110 and on the inner surface of the second electrode E2in the tunnel-shaped cavity TSC.

A drying rate of the alignment solution ALN_L in the tunnel-shapedcavity TSC is proportional to a size of the tunnel-shaped cavity TSC. Asdescribed above, the tunnel-shaped cavity TSC has the first height H1 inthe transmissive area TA, the second height H2 in the reflective areaRA, and the third height H3 in the first area A1. Therefore, the dryingrate of the alignment solution ALN_L is fastest in the transmissive areaTA and slowest in the first area A1.

The alignment solution ALN_L dries rapidly in the transmissive area TAand slowly in the first area A1. The drying rate of the alignmentsolution ALN_L in the reflective area RA is slower than in thetransmissive area TA, but faster than in the first area A1. In thiscase, the alignment solution ALN_L (that starts drying from both the endportions) is bound together in a predetermined area according to thedrying rate. That is, the alignment solution ALN_L (that starts dryingfrom both the end portions) is bound together in the first area A1adjacent to the reflective area RA due to the difference in drying rateof the alignment solution ALN_L.

As an example, when the third height H3 is less than about 1.1micrometers, the alignment layer is bound together in the first area A1adjacent to the reflective area RA. That is, the alignment solutionALN_L drying in the transmissive area TA and the alignment solutionALN_L drying in the reflective area RA may be bound to each other in thefirst area A1 adjacent to the reflective area RA. Accordingly, as shownin FIG. 17C, the alignment layer ALN is formed enclosing thetunnel-shaped cavity TSC in the first area A1.

FIGS. 18A and 18B are cross-sectional views of the liquid crystal layerin the tunnel-shaped cavity taken along lines VI-VI′ and VII-VII′ ofFIG. 11.

Referring to FIGS. 18A and 18B, the liquid crystal layer LC is formed inthe tunnel-shaped cavity TSC. A liquid crystal material in liquid stateis provided at a position adjacent to the tunnel-shaped cavity TSC andflows into the tunnel-shape cavity TSC by capillary action. The liquidcrystal material may be provided, at the position adjacent to the oneend portion of the tunnel-shaped cavity TSC formed in the transmissivearea TA, by an inkjet method using a micropipette.

The liquid crystal layer LC is contained in the tunnel-shape cavity TSC,and does not leak from the tunnel-shaped cavity TSC because thealignment layer ALN encloses the tunnel-shaped cavity TSC in the firstarea A1.

FIGS. 19A and 19B are cross-sectional views of the sealing layer takenalong lines VI-VI′ and VII-VII′ of FIG. 11.

Referring to FIGS. 19A and 19B, the liquid crystal material is removedexcept in the area where the tunnel-shaped cavity TSC is formed. Thesealing layer SL is formed on the roof layer ROF. Specifically, thesealing layer SL covers the substrate 110 and blocks both the endportions of the tunnel-shaped cavity TSC, thereby sealing thetunnel-shaped cavity TSC. The sealing layer SL is formed in contact withthe alignment layer ALN (that encloses the tunnel-shaped cavity TSC inthe first area A1).

The liquid crystal layer LC has a thickness corresponding to the firstdistance d1 in the transmissive area TA of the pixel area PA. Inaddition, the liquid crystal layer LC has a thickness corresponding tothe second distance d2 in the reflective area RA of the pixel area PA.

Thus, the liquid crystal layer LC has the optical property of “Δnd1” inthe transmissive area TA and the optical property of “Δnd2” in thereflective area RA. Accordingly, the display device 500 may be operatedin both the reflective mode and the transmissive mode.

Consequently, the viewing angle of the display device 500 (manufacturedusing the above-mentioned method) may be increased, the alignment layermay be uniformly formed, and the display device 500 may be operated inthe transflective mode.

Although exemplary embodiments of the inventive concept have beendescribed, it is understood that the inventive concept should not belimited to these exemplary embodiments but various changes andmodifications can be made by one of ordinary skill in the art within thespirit and scope of the present disclosure.

What is claimed is:
 1. A display device comprising: a substrateincluding a plurality of pixel areas and a non-pixel area disposedbetween the pixel areas, wherein each of the pixel areas comprises atransmissive area and a reflective area; a tunnel-shaped cavity disposedon the substrate in each of the pixel areas; an image display layerdisposed in the tunnel-shaped cavity; a roof layer disposed on thetunnel-shaped cavity and having an upper planarized surface; a blackmatrix disposed on the substrate in the non-pixel area; and a reflectiveelectrode disposed under the tunnel-shaped cavity in the reflective areaof each of the pixel areas to reflect an external light, wherein thetunnel-shaped cavity has a closed end and an open end facing each other,and the closed end is formed in the reflective area and the open end isformed in the transmissive area.
 2. The display device of claim 1,further comprising a color filter disposed on the substrate in each ofthe pixel areas.
 3. The display device of claim 2, wherein the colorfilter comprises a red color filter, a green color filter, or a bluecolor filter.
 4. The display device of claim 2, further comprising: afirst electrode disposed on the color filter; and a second electrodeextending in a first direction and spaced apart upward from thesubstrate in the pixel area and a predetermined area of the non-pixelarea to define the tunnel-shaped cavity, wherein the roof layer isdisposed on the second electrode.
 5. The display device of claim 4,wherein the non-pixel area comprises: a first non-pixel area disposedbetween the pixel areas in the first direction and extending in a seconddirection crossing the first direction; and a second non-pixel areadisposed between the pixel areas in the second direction and extendingin the first direction, the reflective area is disposed adjacent to thefirst non-pixel area, and the second electrode extends in a first areadefined by a predetermined area of the second non-pixel area in thesecond direction.
 6. The display device of claim 5, wherein thetunnel-shaped cavity has a first height in the transmissive area, asecond height in the reflective area, and a third height in the firstarea that does not overlap with the first non-pixel area, wherein thesecond height is less than the first height and greater than the thirdheight.
 7. The display device of claim 6, wherein the second electrodeis spaced apart from the color filter by the first height in thetransmissive area, spaced apart from the color filter by the secondheight in the reflective area, and spaced apart from the black matrix bythe third height in the first area that does not overlap with the firstnon-pixel area.
 8. The display device of claim 6, wherein the thirdheight is equal to or less than about 1.1 micrometers.
 9. The displaydevice of claim 4, further comprising: a thin film transistor disposedon the substrate in the non-pixel area and connected to the firstelectrode; and an insulating layer disposed on the substrate coveringthe thin film transistor and having a concavo-convex shape in thereflective area, wherein the reflective electrode is disposed on theinsulating layer in the reflective area and having the concavo-convexshape, and the color filter and the black matrix are disposed on theinsulating layer.
 10. The display device of claim 9, further comprisingan alignment layer disposed on an inner surface of the second electrodein the tunnel-shaped cavity and on the substrate covering the firstelectrode, wherein the alignment layer encloses the tunnel-shaped cavityin the first area adjacent to the reflective area.
 11. The displaydevice of claim 10, wherein the image display layer has a first distancecorresponding to a difference in height between the alignment layerdisposed on the first electrode in the transmissive area and thealignment layer disposed on the inner surface of the second electrode inthe transmissive area, and a second distance corresponding to adifference in height between the alignment layer disposed on the firstelectrode in the reflective area and the alignment layer disposed on theinner surface of the second electrode in the reflective area, andwherein the second distance is about half of the first distance.
 12. Thedisplay device of claim 1, wherein the image display layer is a liquidcrystal layer.
 13. The display device of claim 1, further comprising asealing layer disposed on the roof layer and covering the substrate toseal the closed end of the tunnel-shaped cavity.